Parts/CPUs/Intel Xeon E5-2698 v3
CPUs · Haswell-EP · 2014
Intel Xeon E5-2698 v3
16-core Xeon in the Cray XC40 generation.
Why this part
Trinity's first phase was pure Haswell, and its second phase was Knights Landing. Los Alamos deliberately bought a machine in two architecturally different halves so that codes which had not yet been rewritten for wide vectors had somewhere to run while the rewrite happened. Procuring a transition rather than an endpoint is a pattern that recurs whenever a laboratory is asked to change programming model.
Systems using this part
- Systems
- 10
- Rmax underneath
- 39.57 PFlop/s
- Units recorded
- 1,760
1 of 10 edges disclose a quantity
| System | Role | Country | Units | System Rmax | Supplied by | Rank |
|---|---|---|---|---|---|---|
| Trinity 2017-06 | CPU | USA | - | 20.16 PFlop/s | Intel | #7 → |
| Draco 2016-05 | CPU | Germany | 1,760 | 790.70 TFlop/s | Intel | #160 → |
| Phoenix (Adelaide) 2016-02 | CPU | Australia | - | 317.50 TFlop/s | Intel | #439 → |
| Tera-1000-1 2016 | CPU | France | - | 1.87 PFlop/s | Intel | #45 → |
| Abel 2015-06 | CPU | USA | - | 4.04 PFlop/s | Intel | #13 → |
| Shaheen II 2015-03 | CPU | Saudi Arabia | - | 5.54 PFlop/s | Intel | #7 → |
| Beskow 2015 | CPU | Sweden | - | 1.80 PFlop/s | Intel | #70 → |
| Conrad (Navy DSRC) 2015 | CPU | USA | - | 1.29 PFlop/s | Intel | - |
| Gordon (Navy DSRC) 2015 | CPU | USA | - | 1.29 PFlop/s | Intel | - |
| Excalibur | CPU | USA | - | 2.48 PFlop/s | Intel | #20 → |
“Units recorded” sums only the edges where a public source states a quantity. It is a floor, not a total, and should never be read as installed base.