Supercomputers/Systems/Ruth
USA · operational · mixed
Ruth
Also known as ARL DSRC Ruth
Operated by ARL DSRC .
Phase 1 seed dataset, compiled by hand. These rows were built from public operator, laboratory and vendor sources. A mechanical second-reader pass has since fetched every cited source: 1263 of 1345 systems have a readable citation that names them, and 56 are genuinely weakly sourced. Every claim carries its source and a confidence tier. Treat anything below verified as a lead, not a citation.
Measured performance
- Rmax
- -
- Rpeak
- 9.00 PFlop/s
- Rmax ÷ Rpeak
- -
- Cores
- -
- Power
- -
- Per watt
- - GF/W
Figures are as last publicly reported for the configuration described below, not a live measurement. Where a system was upgraded in place, the post-upgrade configuration is shown and the earlier one appears in the timeline.
What this machine is made of
One row per supplier relationship. “Supplier at build” is the company that shipped the part at the time; where that company has since been acquired, the parent it rolls up to today is shown beside it. That distinction is what makes ticker-level aggregation possible across a thirty-year dataset.
| Role | Part | Supplier at build | Quantity | Confidence | Source |
|---|---|---|---|---|---|
| Integrator | - HPE Cray EX system | Hewlett Packard Enterprise | - | Reported | centers.hpc.milcenters.hpc.mil |
| Accelerator | AMD Instinct MI250X Accelerators ROCm (CDNA 2) · 1.7 GHz · TSMC N6 · 560 W AMD Instinct MI250X, eight per AI/ML node, 16 nodes | AMD | 128 reported | Reported | centers.hpc.mil |
| Accelerator | - NVIDIA A40 PCIe, one per visualization node, 24 nodes | NVIDIA | 24 reported | Reported | centers.hpc.mil |
| CPU | AMD EPYC 9004 (Genoa) CPUs x86-64 · 96C · 2.4 GHz · TSMC N5 · 360 W AMD EPYC 9654 Genoa 96C 2.4 GHz, 640 standard and 24 large-memory nodes | AMD | - | Reported | centers.hpc.mil |
| CPU | AMD EPYC 7A53 (Trento) CPUs x86-64 · 64C · 2 GHz · 7 nm · 280 W AMD EPYC 7A53 Trento 2.0 GHz, 16 AI/ML nodes | AMD | - | Reported | centers.hpc.mil |
| Operating system | SUSE Linux Enterprise Server Operating systems Linux distribution · Open source, commercial support subscription SUSE Linux Enterprise Server 15 | SUSE | - | Reported | centers.hpc.mil |
The read
An HPE Cray EX system at the Army Research Laboratory DoD Supercomputing Resource Center, a sibling of Fran and of Jean. The DoD HPCMP hardware table lists 640 standard AMD EPYC 9654 Genoa nodes, 24 large-memory Genoa nodes, 64 high-performance nodes on AMD EPYC 73F3 Milan at 3.5 GHz, 16 AI/ML nodes pairing an AMD EPYC 7A53 Trento with eight AMD Instinct MI250X each, and 24 visualization nodes with NVIDIA A40 GPUs, running SLES 15 under PBS with a rated peak of 9 PFlop/s and a stated end of life of 9 October 2029. The center page describes the system with the same node counts but lists only 4 large-memory nodes. No total core count is stated on the pages used, so none is recorded; the MI250X count of 128 is the 16 AI/ML nodes times eight. Not on the TOP500 lists seen. Tier reported: single source family.
Timeline
No dated events recorded.
Change history
- 2026-10-09 Added Ruth
Source check
We fetched this system's own citations and recorded whether each page actually mentions it. This is a corroboration signal, not a fact check, and it is published so you can see how well the sourcing holds up rather than take it on trust.
None of the cited sources could be read from our network: the hosts returned bot challenges or did not respond. This check says nothing about the citations either way. See how this check works.
| Cited source | Result | Found on the page |
|---|---|---|
| centers.hpc.mil | could not be fetched | - |
| centers.hpc.mil | could not be fetched | - |
Checked 2026-10-13 by pnpm verify. Re-run it and the table changes with the web.
Further reading
Operating a supercomputer
Acceptance testing, why "installed" and "in production" are six months apart, and the machine lifecycle.
Inside a node
Latency-optimised versus throughput-optimised processors, NUMA, and the end of the host-to-device copy.
Programming a supercomputer
The software stack beneath the application, and why the OS is now a sovereignty signal as much as a technical choice.